In the following POWER and POWER2 Instructions table, Instructions that are supported only in POWER2 implementations are indicated by "POWER2" in the POWER2 Only column:
POWER and POWER2 Instructions | |||||
Mnemonic | Instruction | POWER2 Only | Format | Primary Op Code | Extended Op Code |
a[o][.] | Add Carrying | XO | 31 | 10 | |
abs[o][.] | Absolute | XO | 31 | 360 | |
ae[o][.] | Add Extended | XO | 31 | 138 | |
ai | Add Immediate | D | 12 | ||
ai. | Add Immediate and Record | D | 13 | ||
ame[o][.] | Add to Minus One Extended | XO | 31 | 234 | |
and[.] | AND | X | 31 | 28 | |
andc[.] | AND with Complement | X | 31 | 60 | |
andil. | AND Immediate Lower | D | 28 | ||
andiu. | AND Immediate Upper | D | 29 | ||
aze[o][.] | Add to Zero Extended | XO | 31 | 202 | |
b[l][a] | Branch | I | 18 | ||
bc[l][a] | Branch Conditional | B | 16 | ||
bcc[l] | Branch Conditional to Count Register | XL | 19 | 528 | |
bcr[l] | Branch Conditional Register | XL | 19 | 16 | |
cal | Compute Address Lower | D | 14 | ||
cau | Compute Address Upper | D | 15 | ||
cax[o][.] | Compute Address | XO | 31 | 266 | |
clcs | Cache Line Compute Size | X | 31 | 531 | |
clf | Cache Line Flush | X | 31 | 118 | |
cli | Cache Line Invalidate | X | 31 | 502 | |
cmp | Compare | X | 31 | 0 | |
cmpi | Compare Immediate | D | 11 | ||
cmpl | Compare Logical | X | 31 | 32 | |
cmpli | Compare Logical Immediate | D | 10 | ||
cntlz[.] | Count Leading Zeros | X | 31 | 26 | |
crand | Condition Register AND | XL | 19 | 257 | |
crandc | Condition Register AND with Complement | XL | 19 | 129 | |
creqv | Condition Register Equivalent | XL | 19 | 289 | |
crnand | Condition Register NAND | XL | 19 | 225 | |
crnor | Condition Register NOR | XL | 19 | 33 | |
cror | Condition Register OR | XL | 19 | 449 | |
crorc | Condition Register OR with Complement | XL | 19 | 417 | |
crxor | Condition Register XOR | XL | 19 | 193 | |
dclst | Data Cache Line Store | X | 31 | 630 | |
dclz | Data Cache Line Set to Zero | X | 31 | 1014 | |
dcs | Data Cache Synchronize | X | 31 | 598 | |
div[o][.] | Divide | XO | 31 | 331 | |
divs[o][.] | Divide Short | XO | 31 | 363 | |
doz[o][.] | Difference or Zero | XO | 31 | 264 | |
dozi | Difference or Zero Immediate | D | 09 | ||
eciwx | External Control in Word Indexed | X | 31 | 310 | |
ecowx | External Control out Word Indexed | X | 31 | 438 | |
eqv[.] | Equivalent | X | 31 | 284 | |
exts[.] | Extend Sign | X | 31 | 922 | |
fa[.] | Floating Add | A | 63 | 21 | |
fabs[.] | Floating Absolute Value | X | 63 | 264 | |
fcir[.] | Floating Convert to Integer Word | X | 63 | 14 | |
fcirz[.] | Floating Convert to Integer Word with Round to Zero | X | 63 | 15 | |
fcmpo | Floating Compare Ordered | X | 63 | 32 | |
fcmpu | Floating Compare Unordered | XL | 63 | 0 | |
fd[.] | Floating Divide | A | 63 | 18 | |
fm[.] | Floating Multiply | A | 63 | 25 | |
fma[.] | Floating Multiply-Add | A | 63 | 29 | |
fmr[.] | Floating Move Register | X | 63 | 72 | |
fms[.] | Floating Multiply-Subtract | A | 63 | 28 | |
fnabs[.] | Floating Negative Absolute Value | X | 63 | 136 | |
fneg[.] | Floating Negate | X | 63 | 40 | |
fnma[.] | Floating Negative Multiply-Add | A | 63 | 31 | |
fnms[.] | Floating Negative Multiply-Subtract | A | 63 | 30 | |
frsp[.] | Floating Round to Single Precision | X | 63 | 12 | |
fs[.] | Floating Subtract | A | 63 | 20 | |
fsqrt[.] | Floating Square Root | POWER2 | A | 63 | 22 |
ics | Instruction Cache Synchronize | X | 19 | 150 | |
l | Load | D | 32 | ||
lbrx | Load Byte-Reversed Indexed | X | 31 | 534 | |
lbz | Load Byte and Zero | D | 34 | ||
lbzu | Load Byte and Zero with Update | D | 35 | ||
lbzux | Load Byte and Zero with Update Indexed | X | 31 | 119 | |
lbzx | Load Byte and Zero Indexed | X | 31 | 87 | |
lfd | Load Floating-Point Double | D | 50 | ||
lfdu | Load Floating-Point Double with Update | D | 51 | ||
lfdux | Load Floating-Point Double with Update Indexed | X | 31 | 631 | |
lfdx | Load Floating-Point Double Indexed | X | 31 | 599 | |
lfq | Load Floating-Point Quad | POWER2 | D | 56 | |
lfqu | Load Floating-Point Quad with Update | POWER2 | D | 57 | |
lfqux | Load Floating-Point Quad with Update Indexed | POWER2 | X | 31 | 823 |
lfqx | Load Floating-Point Quad Indexed | POWER2 | X | 31 | 791 |
lfs | Load Floating-Point Single | D | 48 | ||
lfsu | Load Floating-Point Single with Update | D | 49 | ||
lfsux | Load Floating-Point Single with Update Indexed | X | 31 | 567 | |
lfsx | Load Floating-Point Single Indexed | X | 31 | 535 | |
lha | Load Half Algebraic | D | 42 | ||
lhau | Load Half Algebraic with Update | D | 43 | ||
lhaux | Load Half Algebraic with Update Indexed | X | 31 | 375 | |
lhax | Load Half Algebraic Indexed | X | 31 | 343 | |
lhbrx | Load Half Byte-Reversed Indexed | X | 31 | 790 | |
lhz | Load Half and Zero | D | 40 | ||
lhzu | Load Half and Zero with Update | D | 41 | ||
lhzux | Load Half and Zero with Update Indexed | X | 31 | 331 | |
lhzx | Load Half and Zero Indexed | X | 31 | 279 | |
lm | Load Multiple | D | 46 | ||
lscbx | Load String and Compare Byte Indexed | X | 31 | 277 | |
lsi | Load String Immediate | X | 31 | 597 | |
lsx | Load String Indexed | X | 31 | 533 | |
lu | Load with Update | D | 33 | ||
lux | Load with Update Indexed | X | 31 | 55 | |
lx | Load Indexed | X | 31 | 23 | |
maskg[.] | Mask Generate | X | 31 | 29 | |
maskir[.] | Mask Insert from Register | X | 31 | 541 | |
mcrf | Move Condition Register Field | XL | 19 | 0 | |
mcrfs | Move to Condition Register from FPSCR | X | 63 | 64 | |
mcrxr | Move to Condition Register from XER | X | 31 | 512 | |
mfcr | Move from Condition Register | X | 31 | 19 | |
mffs[.] | Move from FPSCR | X | 63 | 583 | |
mfmsr | Move from Machine State Register | X | 31 | 83 | |
mfspr | Move from Special-Purpose Register | X | 31 | 339 | |
mfsr | Move from Segment Register | X | 31 | 595 | |
mfsri | Move from Segment Register Indirect | X | 31 | 627 | |
mtcrf | Move to Condition Register Fields | XFX | 31 | 144 | |
mtfsb0[.] | Move to FPSCR Bit 0 | X | 63 | 70 | |
mtfsb1[.] | Move to FPSCR Bit 1 | X | 63 | 38 | |
mtfsf[.] | Move to FPSCR Fields | XFL | 63 | 711 | |
mtfsfi[.] | Move to FPSCR Field Immediate | X | 63 | 134 | |
mtmsr | Move to Machine State Register | X | 31 | 146 | |
mtspr | Move to Special-Purpose Register | X | 31 | 467 | |
mtsr | Move to Segment Register | X | 31 | 210 | |
mtsri | Move to Segment Register Indirect | X | 31 | 242 | |
mul[o][.] | Multiply | XO | 31 | 107 | |
muli | Multiply Immediate | D | 07 | ||
muls[o][.] | Multiply Short | XO | 31 | 235 | |
nabs[o][.] | Negative Absolute | XO | 31 | 488 | |
nand[.] | NAND | X | 31 | 476 | |
neg[o][.] | Negate | XO | 31 | 104 | |
nor[.] | NOR | X | 31 | 124 | |
or[.] | OR | X | 31 | 444 | |
orc[.] | OR with Complement | X | 31 | 412 | |
oril | OR Immediate Lower | D | 24 | ||
oriu | OR Immediate Upper | D | 25 | ||
rac[.] | Real Address Compute | X | 31 | 818 | |
rfi | Return from Interrupt | X | 19 | 50 | |
rfsvc | Return from SVC | X | 19 | 82 | |
rlimi[.] | Rotate Left Immediate then Mask Insert | M | 20 | ||
rlinm[.] | Rotate Left Immediate then AND with Mask | M | 21 | ||
rlmi[.] | Rotate Left then Mask Insert | M | 22 | ||
rlnm[.] | Rotate Left then AND with Mask | M | 23 | ||
rrib[.] | Rotate Right and Insert Bit | X | 31 | 537 | |
sf[o][.] | Subtract from | XO | 31 | 08 | |
sfe[o][.] | Subtract from Extended | XO | 31 | 136 | |
sfi | Subtract from Immediate | D | 08 | ||
sfme[o][.] | Subtract from Minus One Extended | XO | 31 | 232 | |
sfze[o][.] | Subtract from Zero Extended | XO | 31 | 200 | |
si | Subtract Immediate | D | 12 | ||
si. | Subtract Immediate and Record | D | 13 | ||
sl[.] | Shift Left | X | 31 | 24 | |
sle[.] | Shift Left Extended | X | 31 | 153 | |
sleq[.] | Shift Left Extended with MQ | X | 31 | 217 | |
sliq[.] | Shift Left Immediate with MQ | X | 31 | 184 | |
slliq[.] | Shift Left Long Immediate with MQ | X | 31 | 248 | |
sllq[.] | Shift Left Long with MQ | X | 31 | 216 | |
slq[.] | Shift Left with MQ | X | 31 | 152 | |
sr[.] | Shift Right | X | 31 | 536 | |
sra[.] | Shift Right Algebraic | X | 31 | 792 | |
srai[.] | Shift Right Algebraic Immediate | X | 31 | 824 | |
sraiq[.] | Shift Right Algebraic Immediate with MQ | X | 31 | 952 | |
sraq[.] | Shift Right Algebraic with MQ | X | 31 | 920 | |
sre[.] | Shift Right Extended | X | 31 | 665 | |
srea[.] | Shift Right Extended Algebraic | X | 31 | 921 | |
sreq[.] | Shift Right Extended with MQ | X | 31 | 729 | |
sriq[.] | Shift Right Immediate with MQ | X | 31 | 696 | |
srliq[.] | Shift Right Long Immediate with MQ | X | 31 | 760 | |
srlq[.] | Shift Right Long with MQ | X | 31 | 728 | |
srq[.] | Shift RIght with MQ | X | 31 | 664 | |
st | Store | D | 36 | ||
stb | Store Byte | D | 38 | ||
stbrx | Store Byte-Reversed Indexed | X | 31 | 662 | |
stbu | Store Byte with Update | D | 39 | ||
stbux | Store Byte with Update Indexed | X | 31 | 247 | |
stbx | Store Byte Indexed | X | 31 | 215 | |
stfd | Store Floating-Point Double | D | 54 | ||
stfdu | Store Floating-Point Double with Update | D | 55 | ||
stfdux | Store Floating-Point Double with Update Indexed | X | 31 | 759 | |
stfdx | Store Floating-Point Double Indexed | X | 31 | 727 | |
stfq | Store Floating-Point Quad | POWER2 | DS | 60 | |
stfqu | Store Floating-Point Quad with Update | POWER2 | DS | 61 | |
stfqux | Store Floating-Point Quad with Update Indexed | POWER2 | X | 31 | 951 |
stfqx | Store Floating-Point Quad Indexed | POWER2 | X | 31 | 919 |
stfs | Store Floating-Point Single | D | 52 | ||
stfsu | Store Floating-Point Single with Update | D | 53 | ||
stfsux | Store Floating-Point Single with Update Indexed | X | 31 | 695 | |
stfsx | Store Floating-Point Single Indexed | X | 31 | 663 | |
sth | Store Half | D | 44 | ||
sthbrx | Store Half Byte-Reverse Indexed | X | 31 | 918 | |
sthu | Store Half with Update | D | 45 | ||
sthux | Store Half with Update Indexed | X | 31 | 439 | |
sthx | Store Half Indexed | X | 31 | 407 | |
stm | Store Multiple | D | 47 | ||
stsi | Store String Immediate | X | 31 | 725 | |
stsx | Store String Indexed | X | 31 | 661 | |
stu | Store with Update | D | 37 | ||
stux | Store with Update Indexed | X | 31 | 183 | |
stx | Store Indexed | X | 31 | 151 | |
svc[l][a] | Supervisor Call | SC | 17 | ||
t | Trap | X | 31 | 04 | |
ti | Trap Immediate | D | 03 | ||
tlbi | Translation Look-aside Buffer Invalidate Entry | X | 31 | 306 | |
xor[.] | XOR | X | 31 | 316 | |
xoril | XOR Immediate Lower | D | 26 | ||
xoriu | XOR Immediate Upper | D | 27 |