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Assembler Language Reference

srad (Shift Right Algebraic Double Word) Instruction

Purpose

Algebraically shift the contents of a general purpose register right by the number of bits specified by the contents of another general purpose register. Place the result of the operation in another general purpose register.

Syntax

PowerPC
srad RA, RS, RB (Rc=0)
srad. RA, RS, RB (Rc=1)

Description

The contents of general purpose register (GPR) RS are shifted right the number of bits specified by the low-order seven bits of GPR RB. Bits shifted out of position 63 are lost. Bit 0 of GPR RS is replicated to fill the vacated positions on the left. The result is placed into GRP RA. XER[CA] is set if GPR RS is negative and any 1 bits are shifted out of position 63; otherwise XER[CA] is cleared. A shift amount of zero causes GRP RA to be set equal to GPR RS, and XER[CA] to be cleared. Shift amounts from 64 to 127 give a result of 64 sign bits in GRP RA, and cause XER[CA] to receive the sign bit of GPR RS.

Note that the srad instruction, followed by addze, can by used to divide quickly by 2**n. The setting of the CA bit, by srad, is independent of mode.

Other registers altered:

Parameters

RA Specifies target general-purpose register for the result of the operation.
RS Specifies source general-purpose register containing the operand for thr shift operation.
RB Specifies the distance to shift the operand.

Implementation

This instruction is defined only for 64-bit implementations. Using it on a 32-bit implementation will cause the system illegal instruction error handler to be invoked.


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